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Efficient region-aware P/G TSV planning for 3D ICs., , , , , and . ISQED, page 171-178. IEEE, (2014)Improved heuristic equivalent search algorithm based on Maximal Information Coefficient for Bayesian Network Structure Learning., , and . Neurocomputing, (2013)Robust Kernelized Multi-View Self-Representations for Clustering by Tensor Multi-Rank Minimization., , , and . CoRR, (2017)Die Stacking Is Happening, , and . IEEE Micro, 38 (1): 22--28 (2018)A low-power phase change memory based hybrid cache architecture., , , , , , and . ACM Great Lakes Symposium on VLSI, page 395-398. ACM, (2008)Cost-aware three-dimensional (3D) many-core multiprocessor design., , and . DAC, page 126-131. ACM, (2010)Core vs. uncore: the heart of darkness., , , , , and . DAC, page 121:1-121:6. ACM, (2015)GraphIA: an in-situ accelerator for large-scale graph processing., , , , and . MEMSYS, page 79-84. ACM, (2018)NMTSim: Transaction-Command Based Simulator for New Memory Technology Devices., , , , , and . IEEE Comput. Archit. Lett., 19 (1): 76-79 (2020)OpSparse: A Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs., , , , , , and . IEEE Access, (2022)