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Research on Area Modeling Methodology for FPGA Interconnect Circuits.

, , , , , and . ASICON, page 1-4. IEEE, (2019)

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Research on the impact of different benchmark circuits on the representative path in FPGAs., , , , , and . ASICON, page 1-3. IEEE, (2019)Joint Antenna Scheduling and Power Allocation for Multi-Target Tracking under Range Deception Jamming in Distributed MIMO Radar System., , , , and . Remote. Sens., 16 (14): 2616 (July 2024)Research on Area Modeling Methodology for FPGA Interconnect Circuits., , , , , and . ASICON, page 1-4. IEEE, (2019)A Low-delay Configurable Register for FPGA., , , , , , and . ASICON, page 1-4. IEEE, (2019)Resource Optimization Strategy in Phased Array Radar Network for Multiple Target Tracking When Against Active Oppressive Interference., , , and . IEEE Syst. J., 17 (3): 3539-3550 (September 2023)Dynamic Antenna Selection for Colocated MIMO Radar., , , , and . Remote. Sens., 14 (12): 2912 (2022)An Analytical-based Hybrid Algorithm for FPGA Placement., , , , , , , and . ACM Great Lakes Symposium on VLSI, page 351-354. ACM, (2019)FPTLOPT: An Automatic Transistor-Level Optimization Tool for GRM FPGA., , , and . FPGA, page 325. ACM, (2020)Innovative remote sensing methodologies and applications in coastal and marine environments., , , , , , , , , and 5 other author(s). Geo spatial Inf. Sci., 27 (3): 836-853 (May 2024)Pareto-based bi-objective optimization for robust power allocation in hybrid MIMO phased-array radar system under air defense maneuvering tracking., , , , , and . Expert Syst. Appl., (January 2024)