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Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs., , and . CICC, page 233-236. IEEE, (2001)A fast analytical technique for estimating the bounds of on-chip clock wire inductance., , , and . CICC, page 241-244. IEEE, (2001)Introspective 3D chips., , , , , and . ASPLOS, page 264-273. ACM, (2006)Are carbon nanotubes the future of VLSI interconnections?, and . DAC, page 809-814. ACM, (2006)A novel variation-aware low-power keeper architecture for wide fan-in dynamic gates., , and . DAC, page 977-982. ACM, (2006)Performance analysis and technology of 3-D ICs., , , and . SLIP, page 85-90. ACM, (2000)On Thermal Effects in Deep Sub-Micron VLSI Interconnects., , , and . DAC, page 885-891. ACM Press, (1999)Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS., , , and . DAC, page 893-896. ACM, (2010)Inductance Aware Interconnect Scaling., and . ISQED, page 43-47. IEEE Computer Society, (2002)Analysis and optimization of substrate noise coupling in single-chip RF transceiver design., , and . ICCAD, page 309-316. ACM / IEEE Computer Society, (2002)