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Anole: A Highly Efficient Dynamically Reconfigurable Crypto-Processor for Symmetric-Key Algorithms.

, , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3081-3094 (2018)

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A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures., , , , , and . ASP-DAC, page 48-53. IEEE, (2015)Anole: A Highly Efficient Dynamically Reconfigurable Crypto-Processor for Symmetric-Key Algorithms., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (12): 3081-3094 (2018)A 700fps Optimized Coarse-to-Fine Shape Searching Based Hardware Accelerator for Face Alignment., , , , , and . DAC, page 57:1-57:6. ACM, (2017)A 60 Gb/s-Level Coarse-Grained Reconfigurable Cryptographic Processor With Less Than 1-W Power., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (2): 375-379 (2020)A Reliable Physical Unclonable Function Based on Differential Charging Capacitors., , , , , , , , , and . ISCAS, page 1-5. IEEE, (2019)Software Defined Chips - Volume I, 2, , , and . Springer, (2022)Minimizing Pipeline Stalls in Distributed-Controlled Coarse-Grained Reconfigurable Arrays with Triggered Instruction Issue and Execution., , , , , , and . DAC, page 71:1-71:6. ACM, (2017)A High-performance Hardware Implementation of Saber Based on Karatsuba Algorithm., , , , , , , and . IACR Cryptol. ePrint Arch., (2020)Sensitivity enhancement using a nonlinear resonator., and . APCCAS, page 744-747. IEEE, (2010)SURFEX: A 57fps 1080P resolution 220mW silicon implementation for simplified speeded-up robust feature with 65nm process., , , , , and . CICC, page 1-4. IEEE, (2013)