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A Modified RO-PUF with Improved Security Metrics on FPGA., , , , and . iNIS, page 178-181. IEEE, (2016)A Novel Aging Tolerant RO-PUF for Low Power Application., , , and . iNIS, page 187-192. IEEE, (2016)A Flexible Pay-per-Device Licensing Scheme for FPGA IP Cores., , , , and . ISVLSI, page 677-682. IEEE Computer Society, (2017)Analysis of Side-Channel Attack AES Hardware Trojan Benchmarks against Countermeasures., , , , and . ISVLSI, page 574-579. IEEE Computer Society, (2017)Design of Combinational and Sequential Circuits Using Novel Feedthrough Logic., and . VDAT, volume 7373 of Lecture Notes in Computer Science, page 367-369. Springer, (2012)An improved feedthrough logic for low power circuit design., and . RAIT, page 713-716. IEEE, (2012)PUF-Based Secure Test Wrapper for SoC Testing., , , , , and . ISVLSI, page 672-677. IEEE Computer Society, (2018)Microprocessor Based Physical Unclonable Function., , , , and . iNIS, page 246-251. IEEE, (2017)A Novel PUF Based SST to Prevent Distribution of Rejected ICs from Untrusted Assembly., , , and . iNIS, page 314-319. IEEE, (2015)Run Time Mitigation of Performance Degradation Hardware Trojan Attacks in Network on Chip., , , , and . ISVLSI, page 738-743. IEEE Computer Society, (2018)