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Variable-Rate FEC Decoder VLSI Architecture for 400G Rate-Adaptive Optical Communication.

, , and . ICECS, page 45-48. IEEE, (2019)

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Variable-Rate FEC Decoder VLSI Architecture for 400G Rate-Adaptive Optical Communication., , and . ICECS, page 45-48. IEEE, (2019)Energy-Efficient Soft-Assisted Product Decoders., , , , and . OFC, page 1-3. IEEE, (2019)Energy-Efficient Soft-Assisted Product Decoders., , , , and . CoRR, (2018)Hardware Considerations for Selection Networks., , , and . VLSI-SoC, page 40-45. IEEE, (2019)Time-domain digital back propagation: Algorithm and finite-precision implementation aspects., , , , , and . OFC, page 1-3. IEEE, (2017)Custom versus Cell-Based ASIC Design for Many-Channel Correlators., , , and . SiPS, page 176-180. IEEE, (2018)Power Consumption Savings Through Joint Carrier Recovery for Spectral and Spatial Superchannels., , , , , , and . ECOC, page 1-3. IEEE, (2018)Unfolded SiBM BCH Decoders for High- Throughput Low-Latency Applications., , , and . ISVLSI, page 216-221. IEEE, (2024)Variable-Rate VLSI Architecture for 400-Gb/s Hard-Decision Product Decoder., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (1): 25-34 (2021)ASIC Design Exploration of Phase Recovery Algorithms for M-QAM Fiber-Optic Systems., , and . OFC, page 1-3. IEEE, (2019)