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Preprocessing technique for accelerating reconfiguration of degradable VLSI arrays., , , and . ISCAS, page 2424-2427. IEEE, (2013)Low-complexity pruning for accelerating corner detection., , , and . ISCAS, page 1684-1687. IEEE, (2012)Instruction set customization for area-constrained FPGA designs., , , and . SoCC, page 329-334. IEEE, (2011)Dynamically Growing Neural Network Architecture for Lifelong Deep Learning on the Edge., , , , and . FPL, page 262-268. IEEE, (2020)Self-Growing Spatial Graph Network for Context-Aware Pedestrian Trajectory Prediction., and . CoRR, (2020)Adaptive Window Strategy for High-Speed and Robust KLT Feature Tracker., , , and . PSIVT, volume 9431 of Lecture Notes in Computer Science, page 355-367. Springer, (2015)Rapid estimation of DSPs utilization for efficient high-level synthesis., , and . DSP, page 1261-1265. IEEE, (2015)High-throughput image rotation using sign-prediction based redundant cordic algorithm., , and . ICIP, page 2833-2836. IEEE, (2004)Efficient management of custom instructions for run-time reconfigurable instruction set processors., , and . FPT, page 261-264. IEEE, (2006)Travel-Time Prediction of Bus Journey With Multiple Bus Trips., , , and . IEEE Trans. Intell. Transp. Syst., 20 (11): 4192-4205 (2019)