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Enabling energy efficient Hybrid Memory Cube systems with erasure codes.

, , , and . ISLPED, page 67-72. IEEE, (2015)

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Enabling energy efficient Hybrid Memory Cube systems with erasure codes., , , and . ISLPED, page 67-72. IEEE, (2015)A Fast Two Dimensional Deblocking Filter for H.264/AVC Video Coding., , and . CCECE, page 2017-2020. IEEE, (2006)A programmable memory controller for the DDRx interfacing standards., and . ACM Trans. Comput. Syst., 31 (4): 11 (2013)ReTagger: An Efficient Controller for DRAM Cache Architectures., and . DAC, page 196. ACM, (2019)An Efficient Self-Transposing Memory Structure for 32-bit Video Processors., , , and . APCCAS, page 1438-1441. IEEE, (2006)Dual Mode Architecture for Deblocking Filtering in H.264/AVC Video Coding., , and . APCCAS, page 1745-1748. IEEE, (2006)R-Cache: A Highly Set-Associative In-Package Cache Using Memristive Arrays., , and . ICCD, page 423-430. IEEE Computer Society, (2018)Adaptive Time-based Encoding for Energy-Efficient Large Cache Architectures., , and . E2SC@SC, page 5:1-5:8. ACM, (2017)Monarch: A Durable Polymorphic Memory for Data Intensive Applications., and . IEEE Trans. Computers, 72 (2): 535-547 (February 2023)An Efficient and Extendable Modeling Approach for VLIW DSP Processors., , , and . CSICC, volume 6 of Communications in Computer and Information Science, page 267-274. (2008)