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An Edge-endpoint-based Configurable Hardware Architecture for VLSI Layout Design Rule Checking., , and . VLSI Design, 10 (3): 249-263 (2000)Efficient SAT-based bounded model checking for software verification., , , , and . Theor. Comput. Sci., 404 (3): 256-274 (2008)Efficient distributed SAT and SAT-based distributed Bounded Model Checking., , , and . Int. J. Softw. Tools Technol. Transf., 8 (4-5): 387-396 (2006)Exploiting Retiming in a Guided Simulation Based Validation Methodology., , and . CHARME, volume 1703 of Lecture Notes in Computer Science, page 350-353. Springer, (1999)Verification of Embedded Memory Systems using Efficient Memory Modeling, , and . CoRR, (2007)Panel: Assertion-Based Verification -What's the Big Deal?, , , , , , and . HLDVT, page 183. IEEE Computer Society, (2006)Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs., , , , and . ICCAD, page 286-292. IEEE Computer Society, (2001)Scheduling Techniques to Enable Power Management., , , and . DAC, page 349-352. ACM Press, (1996)Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability., , , and . DAC, page 194-199. ACM Press, (1998)Fast functional simulation using branching programs., and . ICCAD, page 408-412. IEEE Computer Society / ACM, (1995)