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JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits.

, , , , , , and . DATE, page 1-6. IEEE, (2024)

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High-efficient architecture of Godson-T many-core processor., , , , , , and . Hot Chips Symposium, page 1-31. IEEE, (2011)A Routing-Aware Mapping Method for Dataflow Architectures., , , , , and . NPC, volume 13615 of Lecture Notes in Computer Science, page 3-16. Springer, (2022)Triangle Counting by Adaptively Resampling over Evolving Graph Streams., , , , , and . SEKE, page 387-392. KSI Research Inc., (2021)A Fast Linear-Space Sequence Alignment Algorithm with Dynamic Parallelization Framework., , and . CIT (1), page 274-279. IEEE Computer Society, (2009)LRP: Predictive output activation based on SVD approach for CNN s acceleration., , , , , and . DATE, page 831-836. IEEE, (2022)Alleviating Transfer Latency in DataFlow Accelerator for DSP Applications., , , , , , , , , and 1 other author(s). ICCD, page 440-443. IEEE, (2023)POSTER: An Optimization of Dataflow Architectures for Scientific Applications., , , , , , and . PACT, page 441-442. ACM, (2016)GVE: Godson-T Verification Engine for many-core architecture rapid prototyping and debugging., , , , and . FPT, page 253-256. IEEE, (2010)Optimizing network efficiency of dataflow architectures through dynamic packet merging., , , , , and . IGSC, page 1-8. IEEE, (2018)P-GAS: Parallelizing a Cycle-Accurate Event-Driven Many-Core Processor Simulator Using Parallel Discrete Event Simulation., , , , , and . PADS, page 89-96. IEEE Computer Society, (2010)