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Disambiguation of "Sakamoto, Ryuichi"

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The Effectiveness of Low-Precision Floating Arithmetic on Numerical Codes: A Case Study on Power Consumption.

, , , , and . HPC Asia, page 199-206. ACM, (2020)

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Ryuichi Nakamura

Keizo Sakamoto

Hideyuki Sakamoto

Peter Takaschi Sakamoto

 

Other publications of authors with the same name

The Effectiveness of Low-Precision Floating Arithmetic on Numerical Codes: A Case Study on Power Consumption., , , , and . HPC Asia, page 199-206. ACM, (2020)A design of hybrid operating system for a parallel computer with multi-core and many-core processors., , , , , , , , and . ROSS@ICS, page 9:1-9:8. ACM, (2012)GraphDEAR: An Accelerator Architecture for Exploiting Cache Locality in Graph Analytics Applications., , , , , , and . PDP, page 135-143. IEEE, (2022)The Design and Implementation of Scalable Deep Neural Network Accelerator Cores., , , , , , , and . MCSoC, page 13-20. IEEE Computer Society, (2017)Design and control methodology for fine grain power gating based on energy characterization and code profiling of microprocessors., , , , , , , , , and 2 other author(s). ASP-DAC, page 843-848. IEEE, (2014)Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect., , , , , , , , , and . FPT, page 293-296. IEEE, (2012)A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface., , , , , , , , , and 2 other author(s). Hot Chips Symposium, page 1. IEEE, (2013)Performance Evaluation of Data Transfer API for Rank Level Approximate Computing on HPC Systems., , , and . IPDPS Workshops, page 445-448. IEEE, (2022)A Preliminary Evaluation of Building Block Computing Systems., , , , , , , and . MCSoC, page 312-319. IEEE, (2019)Efficient and Precise Profiling, Modeling and Management on Power and Performance for Power Constrained HPC Systems., , , , , , and . IEICE Trans. Electron., 104-C (6): 237-246 (2021)