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Disambiguation of "Li, Fule"

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A 13-bit 160MS/s pipelined subranging-SAR ADC with low-offset dynamic comparator.

, , , , and . A-SSCC, page 225-228. IEEE, (2017)

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Günther Fülep

Dan Fulea

Stefanie Fuleda

Li Li

Li Li

 

Other publications of authors with the same name

Lifetime tracing of cardiopulmonary sounds with ultra-low-power sound sensor stick connected to wireless mobile network., , , , , , , , , and 1 other author(s). NEWCAS, page 1-4. IEEE, (2013)A digital blind background calibration algorithm for pipelined ADC., , , , and . NEWCAS, page 1-4. IEEE, (2015)An energy-efficient SoC for closed-loop medical monitoring and intervention., , , , , and . CICC, page 1-4. IEEE, (2010)A high-speed analog front-end circuit used in a 12bit 1GSps pipeline ADC., , , , and . ASICON, page 1-4. IEEE, (2015)A 14bit 320MS/s pipelined-SAR ADC based on multiplexing of dynamic amplifier., and . ASICON, page 628-631. IEEE, (2017)A 12-Bit 2-GS/s Pipelined ADC Front-End Stage with Aperture Error Tuning and Split MDAC., , and . ISCAS, page 1-5. IEEE, (2021)A statistics-based background capacitor mismatch calibration algorithm for SAR ADC., , , , and . ICTA, page 60-61. IEEE, (2022)High Linearity Front-End Circuit for RF Sampling ADCs with Nonlinear Junction Capacitor Cancellation., , , , and . ISCAS, page 1-5. IEEE, (2023)All-Digital Background Calibration of a Pipelined-SAR ADC Using the "Split ADC" Architecture., , , and . ISCAS, page 1-5. IEEE, (2023)Current-Steering DAC Calibration Using Q-Learning., , , , , and . ISCAS, page 1-5. IEEE, (2023)