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Application of Cell-Aware Test on an Advanced 3nm CMOS Technology Library., , , , , , , , и . ITC, стр. 1-6. IEEE, (2019)Formal Methods for Networks on Chips.. ACSD, стр. 188-189. IEEE Computer Society, (2005)Resource utilization and Quality-of-Control trade-off for a composable platform., , , , и . DATE, стр. 654-659. IEEE, (2016)Undisrupted quality-of-service during reconfiguration of multiple applications in networks on chip., , и . DATE, стр. 954-959. EDA Consortium, San Jose, CA, USA, (2007)An Evaluation Framework for Vision-in-the-Loop Motion Control Systems., , , , , , , , и . ETFA, стр. 1-4. IEEE, (2022)Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip., , и . CODES+ISSS, стр. 149-154. ACM, (2007)A reconfigurable real-time SDRAM controller for mixed time-criticality systems., , , и . CODES+ISSS, стр. 2:1-2:10. IEEE, (2013)Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling., , , и . IEEE Trans. Computers, 65 (6): 1882-1895 (2016)Dataflow formalisation of real-time streaming applications on a Composable and Predictable Multi-Processor SOC., , и . J. Syst. Archit., 61 (9): 435-448 (2015)Decoupled inter- and intra-application scheduling for composable and robust embedded MPSoC platforms., , , , и . Map2MPSoC/SCOPES, стр. 13-21. ACM, (2012)