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On Data Forwarding in Deeply Pipelined Soft Processors., , and . FPGA, page 181-189. ACM, (2015)FPGA Acceleration of Irregular Iterative Computations using Criticality-Aware Dataflow Optimizations (Abstract Only)., and . FPGA, page 277. ACM, (2015)Learn the Switches: Evolving FPGA NoCs with Stall-Free and Backpressure Based Routers., , , and . FPL, page 18-25. IEEE, (2020)Mocarabe: High-Performance Time-Multiplexed Overlays for FPGAs., , and . FCCM, page 115-123. IEEE, (2021)An NoC Traffic Compiler for efficient FPGA implementation of Parallel Graph Applications., and . ReCoSoC, volume 7551 of KIT Scientific Reports, page 87-94. KIT Scientific Publishing, (2010)GraphMMU: Memory Management Unit for Sparse Graph Accelerators., , , , and . IPDPS Workshops, page 113-120. IEEE Computer Society, (2015)Timing Fault Detection in FPGA-Based Circuits., , , and . FCCM, page 96-99. IEEE Computer Society, (2014)CaffePresso: an optimized library for deep learning on embedded accelerator-based platforms., , , and . CASES, page 14:1-14:10. ACM, (2016)Case for Design-Specific Machine Learning in Timing Closure of FPGA Designs., , , , and . FPGA, page 169-172. ACM, (2016)GPU-Accelerated High-Level Synthesis for Bitwidth Optimization of FPGA Datapaths., and . FPGA, page 185-194. ACM, (2016)