Author of the publication

Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators.

, , , , , , , and . AICAS, page 1-5. IEEE, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Efficient region-aware P/G TSV planning for 3D ICs., , , , , and . ISQED, page 171-178. IEEE, (2014)Large scale recurrent neural network on GPU., , , , , , , and . IJCNN, page 4062-4069. IEEE, (2014)Register allocation for hybrid register architecture in nonvolatile processors., , , , , and . ISCAS, page 1050-1053. IEEE, (2014)Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate., , and . APCCAS, page 964-967. IEEE, (2006)Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOS., , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 486-495. Springer, (2006)Instruction driven cross-layer CNN accelerator with winograd transformation on FPGA., , , , , , and . FPT, page 227-230. IEEE, (2017)Improved Multiuser Detection for Fast FH/MFSK Systems., , , and . ICWN, page 130-136. CSREA Press, (2005)An adaptive LU factorization algorithm for parallel circuit simulation., , and . ASP-DAC, page 359-364. IEEE, (2012)A hierarchical C2RTL framework for FIFO-connected stream applications., , , , , and . ASP-DAC, page 133-138. IEEE, (2012)A self-aware data compression system on FPGA in Hadoop., , , , , , , and . FPT, page 196-199. IEEE, (2015)