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Другие публикации лиц с тем же именем

Side-Channel Oscilloscope, и . CoRR, (2011)Cache Timing Attacks from The SoCFPGA Coherency Port (Abstract Only).. FPGA, стр. 295-296. ACM, (2017)Exploiting stochastic delay variability on FPGAs with adaptive partial rerouting., , , , и . FPT, стр. 254-261. IEEE, (2013)An 8x8 run-time reconfigurable FPGA embedded in a SoC., , , , и . DAC, стр. 120-125. ACM, (2008)A two-stage variation-aware placement method for FPGAS exploiting variation maps classification., , , , и . FPL, стр. 519-522. IEEE, (2012)Mitigation of process variation effect in FPGAs with partial rerouting method., , , , и . IEICE Electron. Express, 11 (3): 20140011 (2014)Minconvnets: a New Class of Multiplication-Less Neural Networks., , , и . ICIP, стр. 881-885. IEEE, (2022)Beyond Bits: A Quaternary FPGA Architecture Using Multi-Vt Multi-Vdd FDSOI Devices.. ISMVL, стр. 38-43. IEEE Computer Society, (2018)TEE-Time: A Dynamic Cache Timing Analysis Tool for Trusted Execution Environments., , и . ISQED, стр. 1-8. IEEE, (2024)WaterMAS: Sharpness-Aware Maximization for Neural Network Watermarking., , , , , и . CoRR, (2024)