( en | de | ru )

 

Disambiguation of "Jiménez, Raúl"

Author of the publication

copydeleteadd this publication to your clipboard
Selective Clock-Gating for Low-Power Synchronous Counters.

, , , and . J. Low Power Electron., 1 (1): 11-19 (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Raúl Jiménez

Raúl Gimeno

Raúl Mazo

Raúl Valenzuela

Raúl Gutiérrez

 

Other publications of authors with the same name

A Technique to Generate CMOS VLSI Flip-Flops Based on Differential Latches., , , and . PATMOS, volume 2451 of Lecture Notes in Computer Science, page 209-218. Springer, (2002)Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits., , , , and . PATMOS, volume 1918 of Lecture Notes in Computer Science, page 316-326. Springer, (2000)Gravitational Duals from Equations of State., , , , , , and . CoRR, (2024)Low-power logic styles for full-adder circuits., , , and . ICECS, page 1417-1420. IEEE, (2001)Selective Clock-Gating for Low-Power Synchronous Counters., , , and . J. Low Power Electron., 1 (1): 11-19 (2005)Efficient self-timed circuits based on weak NMOS-trees., , , , and . ICECS, page 179-182. IEEE, (1998)A compact voltage-controlled transconductor with high linearity., , , , , and . ICECS, page 21-24. IEEE, (2010)Incentives to Cooperate in Network Formation, and . Computational Econ., 28 (1): 15 (2006)Localization processes for functional data analysis., , and . Adv. Data Anal. Classif., 17 (2): 485-517 (June 2023)Integrated Depths for Partially Observed Functional Data., , , and . J. Comput. Graph. Stat., 32 (2): 341-352 (April 2023)