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A formal instruction-level GPU model for scalable verification.

, , , и . ICCAD, стр. 130. ACM, (2018)

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Sharad Chandra

Sharad Prasad

Shalaka Sharad Shah

Nishant Malik

David Malik

 

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Specification and encoding of transaction interaction properties., , и . Formal Methods Syst. Des., 39 (2): 144-164 (2011)Model checking unbounded concurrent lists., , и . Int. J. Softw. Tools Technol. Transf., 18 (4): 375-391 (2016)A formal instruction-level GPU model for scalable verification., , , и . ICCAD, стр. 130. ACM, (2018)Syntax-Guided Synthesis for Lemma Generation in Hardware Model Checking., , и . VMCAI, том 12597 из Lecture Notes in Computer Science, стр. 325-349. Springer, (2021)System Level Design: Orthogonolization of Concerns and Platform-Based Design, , , , и . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (декабря 2000)Certified Timing Verification and the Transition Delay of a Logic Circuit., , , и . DAC, стр. 549-555. IEEE Computer Society Press, (1992)Towards a Symmetric Treatment of Satisfaction and Conflicts in Quantified Boolean Formula Evaluation., и . CP, том 2470 из Lecture Notes in Computer Science, стр. 200-215. Springer, (2002)Exploiting Retiming in a Guided Simulation Based Validation Methodology., , и . CHARME, том 1703 из Lecture Notes in Computer Science, стр. 350-353. Springer, (1999)On Solving the Partial MAX-SAT Problem., и . SAT, том 4121 из Lecture Notes in Computer Science, стр. 252-265. Springer, (2006)INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms., , , и . DAC, стр. 1-4. IEEE, (2023)