( en | de | ru )

 

Disambiguation of "Yu, Heng"

Author of the publication

copydeleteadd this publication to your clipboard
DVFS-Based Quality Maximization for Adaptive Applications With Diminishing Return.

, , , , and . IEEE Trans. Computers, 70 (5): 803-816 (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Heng-yü Kuo

Heiner Heng

Heng Li

Yi Heng

Nora Heng

 

Other publications of authors with the same name

A High-Density Magnetoresistive Biosensor Array with Drift-Compensation Mechanism., , , , and . ISSCC, page 168-594. IEEE, (2007)DVFS-Based Quality Maximization for Adaptive Applications With Diminishing Return., , , , and . IEEE Trans. Computers, 70 (5): 803-816 (2021)The architecture and placement algorithm for a uni-directional routing based 3D FPGA., , , and . FPT, page 28-33. IEEE, (2013)Leakage-aware dynamic scheduling for real-time adaptive applications on multiprocessor systems., , and . DAC, page 493-498. ACM, (2010)Multiscale Collaborative Deep Models for Neural Machine Translation., , , , , and . ACL, page 414-426. Association for Computational Linguistics, (2020)Learning to Generalize to More: Continuous Semantic Augmentation for Neural Machine Translation., , , , , and . ACL (1), page 7930-7944. Association for Computational Linguistics, (2022)Energy Efficiency Optimization of FPGA-based CNN Accelerators with Full Data Reuse and VFS., , , and . ICECS, page 446-449. IEEE, (2019)Non-pooling Network for medical image segmentation., and . CoRR, (2023)A Multi-Application Mapping Framework for Network-on-Chip Based MPSoC: An FPGA Implementation Case Study., , , and . ERSA, page 267-270. CSREA Press, (2009)On Learning Universal Representations Across Languages., , , , , and . ICLR, OpenReview.net, (2021)