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A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process.

, , , , and . APCCAS, page 271-275. IEEE, (2023)

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A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process., , , , , , , and . Integr., (May 2023)A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder., , , , , and . Circuits Syst. Signal Process., 42 (4): 2283-2304 (April 2023)A 2.5-GHz 2×VDD 16-nm FinFET Digital Output Buffer with Slew Rate and Duty Cycle Self-Adjustment., , , and . APCCAS, page 153-156. IEEE, (2021)A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process., , , , and . APCCAS, page 271-275. IEEE, (2023)A 40-nm CMOS Wide Input Range and Variable Gain Time-Difference Amplifier Based on Current Source Architecture., , and . ISCAS, page 2923-2927. IEEE, (2022)Development of Fertile Egg Detection and Incubation System Using Image Processing and Automatic Candling., , , , , and . TENCON, page 701-706. IEEE, (2018)Passiveless Digitally Controlled Oscillator With Embedded PVT Detector Using 40-nm CMOS., , , , and . ASICON, page 1-5. IEEE, (2023)A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology., , , , , and . APCCAS, page 251-255. IEEE, (2022)Development of an IoT-based Aquaponics Monitoring and Correction System with Temperature-Controlled Greenhouse., , , , , , , and . ISOCC, page 261-262. IEEE, (2019)A single-chip PFM-controlled LED driver with 0.5% illuminance variation., , , , , , , and . Microelectron. J., (2024)