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Back-End-of-Line Defect Analysis for Rnv8T Nonvolatile SRAM.

, , , , , , , and . Asian Test Symposium, page 123-127. IEEE Computer Society, (2013)

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Back-End-of-Line Defect Analysis for Rnv8T Nonvolatile SRAM., , , , , , , and . Asian Test Symposium, page 123-127. IEEE Computer Society, (2013)Cost-Effective TAP-Controlled Serialized Compressed Scan Architecture for 3D Stacked ICs., , , , , , and . Asian Test Symposium, page 107-108. IEEE Computer Society, (2013)