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Disambiguation of "Kim, Jae Joon"

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Magnetic Induction Tomography Using Multi-Channel Phase-Domain Transceiver for Structural Health Monitoring.

, , , , , and . IEEE Trans. Instrum. Meas., (2022)

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Joon-Young Kim

Nam-Joon Kim

Man Joon Kim

Joon-Soon Kim

Hyun-Joon Kim

 

Other publications of authors with the same name

A Novel In-DRAM Accelerator Architecture for Binary Neural Network., , , and . COOL CHIPS, page 1-3. IEEE, (2020)Column-selection-enabled 8T SRAM array with ~1R/1W multi-port operation for DVFS-enabled processors., , , , , and . ISLPED, page 303-308. IEEE/ACM, (2011)Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies., , , and . ISCAS, page 384-387. IEEE, (2008)Low design overhead timing error correction scheme for elastic clock methodology., , and . ISLPED, page 1-6. IEEE, (2017)A Completely Digital On-Chip Circuit for Local-Random-Variability Measurement., , and . ISSCC, page 412-413. IEEE, (2008)Double Viterbi: Weight Encoding for High Compression Ratio and Fast On-Chip Reconstruction for Deep Neural Network., , , and . ICLR (Poster), OpenReview.net, (2019)V-LSTM: An Efficient LSTM Accelerator Using Fixed Nonzero-Ratio Viterbi-Based Pruning., , and . FPGA, page 326. ACM, (2020)A Pixel Circuit With Leakage Current Compensation Using PWM-Based Data Cycling for AMLED Displays., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (1): 61-65 (2023)INSTA-BNN: Binary Neural Network with INSTAnce-aware Threshold., , , and . ICCV, page 17279-17288. IEEE, (2023)Workload-Balanced Graph Attention Network Accelerator with Top-K Aggregation Candidates., , and . ICCAD, page 39:1-39:9. ACM, (2022)