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Disambiguation of "Forlin, Bruno"

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Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs.

, , , , , and . ISVLSI, page 536-541. IEEE, (2020)

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Prisca Forlin

Michele Forlin

Horst Bruno

Armin Bruno

Axel Brunold

 

Other publications of authors with the same name

Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs., , , , , , and . DFT, page 1-6. IEEE, (2023)G-PUF: An Intrinsic PUF Based on GPU Error Signatures., , , , , and . ETS, page 1-2. IEEE, (2020)Security Aspects of Real-Time MPSoCs: The Flaws and Opportunities of Preemptive NoCs., , and . VLSI-SoC (Selected Papers), volume 586 of IFIP Advances in Information and Communication Technology, page 209-233. Springer, (2019)Lightweight Instrumentation for Accurate Performance Monitoring in RTOSes., , , , and . DATE, page 1-2. IEEE, (2024)Cache timing attacks on NoC-based MPSoCs., , and . Microprocess. Microsystems, (2019)Attacking Real-time MPSoCs: Preemptive NoCs are Vulnerable., , and . VLSI-SoC, page 204-209. IEEE, (2019)Earthquake - A NoC-based optimized differential cache-collision attack for MPSoCs., , , and . DATE, page 648-653. IEEE, (2018)Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs., , , , , and . ISVLSI, page 536-541. IEEE, (2020)Providing Plug N' Play for Processing-in-Memory Accelerators., , and . ASP-DAC, page 651-656. ACM, (2021)Sim2PIM: A complete simulation framework for Processing-in-Memory., , , , and . J. Syst. Archit., (2022)