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Disambiguation of "Ryu, Sungju"

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BitBlade: Energy-Efficient Variable Bit-Precision Hardware Accelerator for Quantized Neural Networks.

, , , , , , and . IEEE J. Solid State Circuits, 57 (6): 1924-1935 (2022)

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Ryu Yoshiwhara

Hosuk Ryu

Stella Ryu

Ryu Saito

Soojung Ryu

 

Other publications of authors with the same name

Low design overhead timing error correction scheme for elastic clock methodology., , and . ISLPED, page 1-6. IEEE, (2017)Mobileware: Distributed Architecture With Channel Stationary Dataflow for MobileNet Acceleration., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (9): 2661-2673 (September 2024)Area-Efficient Transposable 6T SRAM for Fast Online Learning in Neuromorphic Processors., , , , and . CICC, page 1-4. IEEE, (2019)Teleport: A High-Performance ShiftNet Hardware Accelerator with Fused Layer Computation., and . ISLPED, page 1-6. IEEE, (2023)BitBlade: Area and Energy-Efficient Precision-Scalable Neural Network Accelerator with Bitwise Summation., , , and . DAC, page 84. ACM, (2019)Area-efficient AdderNet hardware accelerator with merged adder tree structure., and . IEICE Electron. Express, 20 (23): 20230427 (December 2023)BitBlade: Energy-Efficient Variable Bit-Precision Hardware Accelerator for Quantized Neural Networks., , , , , , and . IEEE J. Solid State Circuits, 57 (6): 1924-1935 (2022)Mobileware: A High-Performance MobileNet Accelerator with Channel Stationary Dataflow., , and . ICCAD, page 1-9. IEEE, (2021)A 44.1TOPS/W Precision-Scalable Accelerator for Quantized Neural Networks in 28nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2020)High-throughput Near-Memory Processing on CNNs with 3D HBM-like Memory., , , and . ACM Trans. Design Autom. Electr. Syst., 26 (6): 48:1-48:20 (2021)