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Low-complexity pruning for accelerating corner detection., , , и . ISCAS, стр. 1684-1687. IEEE, (2012)Instruction set customization for area-constrained FPGA designs., , , и . SoCC, стр. 329-334. IEEE, (2011)Partial rerouting algorithm for reconfigurable VLSI arrays., и . ISCAS (5), стр. 641-644. IEEE, (2003)Preprocessing technique for accelerating reconfiguration of degradable VLSI arrays., , , и . ISCAS, стр. 2424-2427. IEEE, (2013)Algorithmic aspects for power-efficient hardware/software partitioning., , и . Math. Comput. Simul., 79 (4): 1204-1215 (2008)An Iterative Technique for Runtime Efficient Hardware-Software Partitioning., , , , и . FPT, стр. 403-406. IEEE, (2019)Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms., , , и . J. Syst. Archit., 56 (7): 242-255 (2010)Online Map-Matching of Noisy and Sparse Location Data With Hidden Markov and Route Choice Models., и . IEEE Trans. Intell. Transp. Syst., 18 (9): 2423-2434 (2017)A MSB-biased self-organizing feature map for still color image compression., , и . APCCAS (2), стр. 85-88. IEEE, (2002)A Novel Binding Algorithm to Reduce Critical Path Delay During High Level Synthesis., , , и . ISVLSI, стр. 278-283. IEEE Computer Society, (2011)