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Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000., , , and . IEEE Trans. Circuits Syst. Video Techn., 13 (3): 219-230 (2003)Reconfigurable architecture for video applications., , , , and . SoCC, page 21-24. IEEE, (2007)Design and implementation of JPEG encoder IP core., , , and . ASP-DAC, page 29-30. ACM, (2001)124Ms/s pixel-pipelined motion-JPEG 2000 codec without tile memory., , , , , , and . ISSCC, page 1586-1595. IEEE, (2006)Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000., , , and . ISCAS (4), page 329-332. IEEE, (2002)Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval., , , and . PCM (2), volume 3332 of Lecture Notes in Computer Science, page 130-137. Springer, (2004)Effective hardware-oriented technique for the rate control of JPEG2000 encoding., , , , and . ISCAS (2), page 684-687. IEEE, (2003)Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding., , , and . ISCAS (2), page 193-196. IEEE, (2001)Scalable video adaptation optimization using soft decision scheme., , , , and . ICME, page 469-472. IEEE Computer Society, (2008)Hardware architecture design of an H.264/AVC video codec., , and . ASP-DAC, page 750-757. IEEE, (2006)