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A model-based design space exploration for embedded image processing in industrial applications., , , , и . INDIN, стр. 434-439. IEEE, (2014)Model-Based Design Methodology for Early Evaluation of Real-time and Embedded Constraints., , , , и . INDIN, стр. 875-881. IEEE, (2018)Implementation of the AES Algorithm for a Reconfigurable, Bit Serial, Fully Pipelined Architecture., и . ARC, том 5453 из Lecture Notes in Computer Science, стр. 330-335. Springer, (2009)Towards Formalized Model-Based Requirements for a Seamless Design Approach in Safety-Critical Systems Development., , и . ISORC Workshops, стр. 111-115. IEEE Computer Society, (2015)A new Design Partitioning Approach for Low Power High-Level Synthesis., и . DELTA, стр. 143-148. IEEE Computer Society, (2006)Communication Layer Architecture for a Production Line Digital Twin Using Hierarchical Colored Petri Nets., , и . IESS, том 669 из IFIP Advances in Information and Communication Technology, стр. 41-50. Springer, (2022)Combining an Iterative State-Based Timing Analysis with a Refinement Checking Technique., , и . IESS, том 523 из IFIP Advances in Information and Communication Technology, стр. 88-99. Springer, (2015)A Proposal to Trace and Maintain Requirements Constraints of Real-time Embedded Systems., , , , и . IESS, том 576 из IFIP Advances in Information and Communication Technology, стр. 15-26. Springer, (2019)Control Development for Mechatronic Systems with a Fully Reconfigurable Pipeline Architecture., , , , и . SBCCI, стр. 231-236. IEEE Computer Society, (2003)Spezielle Aspekte der Verlustleistungsgetriebenen High-Level Synthese., , и . GI Jahrestagung (1), том P-67 из LNI, стр. 455. GI, (2005)