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Reconfiguration in Source-Synchronous Receivers for Short-Reach Parallel Optical Links.

, , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (7): 1548-1560 (2019)

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Reconfiguration in Source-Synchronous Receivers for Short-Reach Parallel Optical Links., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (7): 1548-1560 (2019)Optimal Optical Receivers in Nanoscale CMOS: A Tutorial., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2604-2609 (2022)An Ultra-Low-Power Energy-Efficient Dual-Mode Wake-Up Receiver., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (2): 517-526 (2015)A linearized voltage-controlled oscillator for dual-path phase-locked loops., , and . ISCAS, page 2678-2681. IEEE, (2013)A 8-Gb/s 0.256-pJ/b transceiver for 5-mm on-chip interconnects in 130-nm CMOS., and . ISCAS, page 1-4. IEEE, (2017)10 Gb/s optical receiver with continuous-time feed-forward equalization., and . MWSCAS, page 926-929. IEEE, (2017)20 Gb/s Dual-Mode SST VCSEL Driver., , and . MWSCAS, page 428-431. IEEE, (2021)A Pull-up VCSEL Driver With a Shunt RC Load in 65-nm CMOS., and . MWSCAS, page 1022-1025. IEEE, (2021)Design of Novel Analog Compute Paradigms with Ark., , , and . ASPLOS (2), page 269-286. ACM, (2024)Multi-Phase Hybrid Boost Converter with High Conduction Loss Reduction and Fast Dynamic Response for Automotive Applications., , , and . NEWCAS, page 183-187. IEEE, (2022)