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Disambiguation of "Gürkaynak, Frank K."

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High speed ASIC implementations of leakage-resilient cryptography.

, , , , , and . DATE, page 1259-1264. IEEE, (2018)

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Erdal Gürkaynak

Ethem Yalç Gürkaynak

Frank K Peter

Frank K Wilhelm-Mauch

Aman K K Bhasin

 

Other publications of authors with the same name

Design space exploration for field programmable compressor trees., , , , , , and . CASES, page 207-216. ACM, (2008)Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers., , , and . ISCAS, page 2740-2743. IEEE, (2014)On-Demand Redundancy Grouping: Selectable Soft-Error Tolerance for a Multicore Cluster., , , , and . ISVLSI, page 398-401. IEEE, (2022)Towards an AES crypto-chip resistant to differential power analysis., , , , , and . ESSCIRC, page 307-310. IEEE, (2004)A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems., , , , , and . ASYNC, page 181-189. IEEE Computer Society, (2002)GALS at ETH Zurich: Success or Failure., , , , and . ASYNC, page 150-159. IEEE Computer Society, (2006)Basilisk: An End-to-End Open-Source Linux-Capable RISC-V SoC in 130nm CMOS., , , , and . CoRR, (2024)High speed ASIC implementations of leakage-resilient cryptography., , , , , and . DATE, page 1259-1264. IEEE, (2018)A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range., , , , , and . ESSCIRC, page 263-266. IEEE, (2021)A 2 Gb/s balanced AES crypto-chip implementation., , , , , , and . ACM Great Lakes Symposium on VLSI, page 39-44. ACM, (2004)