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Communication-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (8): 1796-1806 (2020)

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Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (4): 584-592 (2011)Loop scheduling and assignment to minimize energy while hiding latency for heterogeneous multi-bank memory., , , , , and . FPL, page 459-462. IEEE, (2008)Towards Independent On-device Artificial Intelligence., and . ISVLSI, page 351. IEEE, (2022)CORUSCANT: Fast Efficient Processing-in-Racetrack Memories., , , , , and . MICRO, page 784-798. IEEE, (2022)Minimizing accumulative memory load cost on multi-core DSPs with multi-level memory., , , , , and . J. Syst. Archit., 59 (7): 389-399 (2013)Developing a Miniature Energy-Harvesting-Powered Edge Device with Multi-Exit Neural Network., , , , , and . ISCAS, page 1-5. IEEE, (2021)Dynamic and Leakage Power Minimization with Loop Voltage Scheduling and Assignment., , , , and . EUC (1), page 192-198. IEEE Computer Society, (2008)Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence., , , , , and . ASP-DAC, page 85-90. IEEE, (2020)AIM: Fast and energy-efficient AES in-memory implementation for emerging non-volatile main memory., , , , , and . DATE, page 625-628. IEEE, (2018)Optimizing Data Allocation and Memory Configuration for Non-Volatile Memory Based Hybrid SPM on Embedded CMPs., , , , and . IPDPS Workshops, page 982-989. IEEE Computer Society, (2012)