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A DSP-Based HEVC decoder implementation using an actor language dataflow model.

, , , , and . IEEE Trans. Consumer Electron., 59 (4): 839-847 (2013)

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A 2-D Multiple Transform Processor for the Versatile Video Coding Standard., , , , and . IEEE Trans. Consumer Electronics, 65 (3): 274-283 (2019)Design of multicore HEVC decoders using actor-based dataflow models and OpenMP., , , , and . IEEE Trans. Consumer Electron., 62 (3): 325-333 (2016)A Flexible H.263 Video Coder Prototype Based on FPGA., , , and . IEEE International Workshop on Rapid System Prototyping, page 34-41. IEEE Computer Society, (2002)A DSP-Based HEVC decoder implementation using an actor language dataflow model., , , , and . IEEE Trans. Consumer Electron., 59 (4): 839-847 (2013)A Flexible Architecture for H.263 Video Coding., , , and . DSD, page 70-77. IEEE Computer Society, (2002)The Prototyping Methodology of a Data Receiver for Digital Audio Broadcasting (DAB) Networks., , , , , and . IEEE International Workshop on Rapid System Prototyping, page 76-81. IEEE Computer Society, (2006)A Linux implementation of the energy-based fair queuing algorithm on an ARM-based embedded system., , , and . ICCE, page 546-547. IEEE, (2014)Design of multicore HEVC decoders using actor-based dataflow models and OpenMP., , , , and . ICCE, page 287-288. IEEE, (2016)On an implementation of HEVC video decoders with DSP technology., , , and . ICCE, page 121-122. IEEE, (2013)Multi-DSP implementation of a H.264/SVC decoder., , , , and . ISCE, page 145-146. IEEE, (2013)