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A precharged-capacitor-assisted sensing (PCAS) scheme with novel level controllers for low-power DRAMs.

, , , , , and . IEEE J. Solid State Circuits, 35 (8): 1179-1185 (2000)

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A novel charge recovery logic structure with complementary pass-transistor network., , and . ISOCC, page 17-20. IEEE, (2012)Design methodology of embedded DRAM with virtual-socket architecture., , , , , , , and . IEEE J. Solid State Circuits, 36 (1): 46-54 (2001)Double charge pump circuit with triple charge sharing clock scheme., , , and . ASICON, page 128-132. IEEE, (2011)A non-rectifier wireless power transmission system using on-chip inductor., , and . ASICON, page 112-115. IEEE, (2011)Low-Power On-Chip Charge-Recycling DC-DC Conversion Circuit and System., , , , , and . IEEE J. Solid State Circuits, 48 (11): 2608-2617 (2013)A novel charge sharing charge pump for energy harvesting application., , , , and . ISOCC, page 373-376. IEEE, (2011)A CMOS voltage reference combining body effect with switched-current technique., , and . ISOCC, page 92-95. IEEE, (2012)CMOS low-power subthreshold reference voltage utilizing self-biased body effect., , , and . ASICON, page 516-519. IEEE, (2011)Word error control algorithm through multi-reading for NAND Flash memories., and . ASICON, page 236-239. IEEE, (2011)A 65 nm Embedded SRAM With Wafer Level Burn-In Mode, Leak-Bit Redundancy and Cu E-Trim Fuse for Known Good Die., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 43 (1): 96-108 (2008)