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Secure Logic Locking with Strain-Protected Nanomagnet Logic., , , , , , , , , and 3 other author(s). DAC, page 127-132. IEEE, (2021)Device Modeling and Circuit Design for Scalable Beyond-CMOS Computing., , , , and . VLSI-SOC, page 210-211. IEEE, (2020)CMOS-Free Multilayer Perceptron Enabled by Four-Terminal MTJ Device., , , , , , , and . CoRR, (2020)Domain Wall Leaky Integrate-and-Fire Neurons with Shape-Based Configurable Activation Functions., , , , , , , , , and . CoRR, (2020)Shape-based Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron., , , , , , , , , and . CoRR, (2019)Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits., , , , , , , , and . DATE, page 17-22. IEEE, (2022)Intrinsic Lateral Inhibition Facilitates Winner-Take-All in Domain Wall Racetrack Arrays for Neuromorphic Computing., , , , , , and . ISCAS, page 316-320. IEEE, (2022)Unsupervised Competitive Hardware Learning Rule for Spintronic Clustering Architecture., , , , , , , and . CoRR, (2020)Toggle Spin-Orbit Torque MRAM with Perpendicular Magnetic Anisotropy., , , and . CoRR, (2019)CMOS-Free Magnetic Domain Wall Leaky Integrate-and-Fire Neurons with Intrinsic Lateral Inhibition., , , , , , , , and . ISCAS, page 1-5. IEEE, (2020)