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Versatile Framework for Power Delivery Exploration.

, , , , , и . ISCAS, стр. 1-5. IEEE, (2018)

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Zviel Friedman

Alexander Friedman

Ariell Friedman

Michel Friedman

Henry Dan Friedman

 

Другие публикации лиц с тем же именем

Clock tree layout design for reduced delay uncertainty., , и . SoCC, стр. 179-180. IEEE, (2004)Low power repeaters driving RC interconnects with delay and bandwidth constraints., и . SoCC, стр. 335-339. IEEE, (2004)Exploiting the on-chip inductance in high-speed clock distribution networks, , и . IEEE Trans. Very Large Scale Integr. Syst., 9 (6): 963--973 (декабря 2001)Circuit Synthesis of Clock Distribution Networks Based on Non-Zero Clock Skew., и . ISCAS, стр. 175-178. IEEE, (1994)Monotonicity Constraints on Path Delays for Efficient Retiming with Localized Clock Skew and Variable Register Delay., , и . ISCAS, стр. 1748-1751. IEEE, (1995)Inductance/area/resistance tradeoffs in high performance power distribution grids., и . ISCAS (1), стр. 101-104. IEEE, (2002)Decoupling technique and crosstalk analysis for coupled RLC interconnects., и . ISCAS (2), стр. 521-524. IEEE, (2004)Compact substrate models for efficient noise coupling and signal isolation analysis., , , , , и . ISCAS, стр. 2346-2349. IEEE, (2010)Forward body biased keeper for enhanced noise immunity in domino logic circuits., и . ISCAS (2), стр. 917-920. IEEE, (2004)Equivalent rise time for resonance in power/ground noise estimation., , , и . ISCAS, стр. 2422-2425. IEEE, (2008)