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Reversible logic implementation of AES algorithm., , , and . DTIS, page 140-144. IEEE, (2013)Fast, scalable, and programmable packet scheduler in hardware.. SIGCOMM, page 367-379. ACM, (2019)Finding Critical Components in Embedded Control Systems Sensitive to Quality-Faults., , , , and . ISED, page 167-171. IEEE, (2012)Globally Synchronized Time via Datacenter Networks., , , and . SIGCOMM, page 454-467. ACM, (2016)Seer: Enabling Future-Aware Online Caching in Networked Systems., and . NSDI, page 635-649. USENIX Association, (2024)Leo: Online ML-based Traffic Classification at Multi-Terabit Line Rate., , , and . NSDI, USENIX Association, (2024)Breaking the VLB Barrier for Oblivious Reconfigurable Networks., , , , , and . STOC, page 1865-1876. ACM, (2024)P4FPGA: A Rapid Prototyping Framework for P4., , , , , , and . SOSR, page 122-135. ACM, (2017)Extending Optimal Oblivious Reconfigurable Networks to all N., , , , and . APOCS, page 1-16. SIAM, (2023)Optimal oblivious reconfigurable networks., , , , , and . STOC, page 1339-1352. ACM, (2022)