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Checking signal transition graph implementability by symbolic BDD traversal.

, , , , , и . ED&TC, стр. 325-332. IEEE Computer Society, (1995)

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Sergey Yakovlev

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Alexandre Varnek

Alexandre Martins

Alexandre Alexeev

 

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Signal Graphs: From Self-Timed to Timed Ones., и . PNPM, стр. 199-206. IEEE Computer Society, (1985)Analyzing Semantics of Concurrent Hardware Specifications., и . ICPP (3), стр. 211-218. Pennsylvania State University Press, (1989)0-271-00686-2.Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis., , , , и . DAC, стр. 63-66. ACM Press, (1996)Synthesis of Speed-Independent Circuits from STG-Unfolding Segment., , , , и . DAC, стр. 16-21. ACM Press, (1997)Global interconnections in FPGAs: modeling and performance analysis., , , , , и . SLIP, стр. 51-58. ACM, (2008)Low Latency Synchronization Through Speculation., и . PATMOS, том 3254 из Lecture Notes in Computer Science, стр. 278-288. Springer, (2004)Evaluation of energy-recovering interconnects for low-power 3D stacked ICs., , , и . 3DIC, стр. 1-5. IEEE, (2009)Hardware and Petri Nets: Application to Asynchronous Circuit Design., , , , и . ICATPN, том 1825 из Lecture Notes in Computer Science, стр. 1-15. Springer, (2000)Modelling and verification of an atomic action protocol implemented in Ada., , , , , , и . Comput. Syst. Sci. Eng., 16 (3): 173-182 (2001)Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings., , и . ACSD, стр. 57-68. IEEE Computer Society, (2006)