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Power efficient encoding techniques for off-chip data buses., , , , и . CASES, стр. 267-275. ACM, (2003)A wave-pipelined router architecture using ternary associative memory., , и . ACM Great Lakes Symposium on VLSI, стр. 67-70. ACM, (2000)An efficient scheduling algorithm for combined input-crosspoint-queued (CICQ) switches., и . GLOBECOM, стр. 1168-1173. IEEE, (2004)Optimizing Throughput and Latency under Given Power Budget for Network Packet Processing., и . INFOCOM, стр. 2901-2909. IEEE, (2010)Analysis of Interconnection Networks with Different Arbiter Designs.. J. Parallel Distributed Comput., 4 (4): 384-403 (1987)Computation Availability of Multiple-Bus Multiprocessors., и . ICPP, стр. 807-813. IEEE Computer Society Press, (1985)Performance Evaluation of Multistage Interconnection Networks with Finite Buffers., и . ICPP (1), стр. 592-599. CRC Press, (1991)A Formal Specification and Verification Technique for Cache Coherence Protocols., и . ICPP (1), стр. 22-26. CRC Press, (1992)Juggler: a dependence-aware task-based execution framework for GPUs., , , и . PPoPP, стр. 54-67. ACM, (2018)Improving Energy Saving of One-Sided Matrix Decompositions on CPU-GPU Heterogeneous Systems., , , , , и . PPoPP, стр. 274-287. ACM, (2023)