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Disambiguation of "Sherwani, Naveed A."

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Algorithmic Aspects of Three Dimensional MCM Routing.

, , and . DAC, page 397-401. ACM Press, (1994)

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Dara Sherwani

Nasir Naveed

Naveed Ramzan

Naveed Ahmed

Naveed Honarvar

 

Other publications of authors with the same name

Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designs., , , and . ISPD, page 56-61. ACM, (2002)An optimal algorithm for maximum two planar subset problem VLSI layout., , , and . Great Lakes Symposium on VLSI, page 80-85. IEEE, (1994)A Provably Good Algorithm for k-Layer Topological Planar Routing Problems., , and . VLSI Design, page 113. IEEE Computer Society, (1993)Embedded Tutorial: Layout Driven Synthesis or Synthesis Driven Layout., and . VLSI Design, page 44-47. IEEE Computer Society, (1998)SRC physical design top ten problem., , , , and . ISPD, page 55-58. ACM, (1999)Efficient Over-the-cell Routing Algorithm for General Middle Terminal Model., , and . ISCAS, page 1861-1864. IEEE, (1993)Comparative Analysis of New CMOS Leaf Cells for OTC Routing., , , , and . ISCAS, page 191-194. IEEE, (1994)Over-the-Cell Channel Routing for High Performance Circuits., , , and . DAC, page 600-603. IEEE Computer Society Press, (1992)Integrated floorplanning and interconnect planning., , , , , and . ICCAD, page 354-357. IEEE Computer Society, (1999)Over-the-Cell Routing Algorithms for Industrial Cell Models., , , and . VLSI Design, page 143-148. IEEE Computer Society, (1994)