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PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications.

, , , and . MICRO, page 788-801. IEEE Computer Society, (2018)

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Parsimony: Enabling SIMD/Vector Programming in Standard Compiler Flows., , , , and . CGO, page 186-198. ACM, (2023)FinePack: Transparently Improving the Efficiency of Fine-Grained Transfers in Multi-GPU Systems., , , , and . HPCA, page 516-529. IEEE, (2023)COATCheck: Verifying Memory Ordering at the Hardware-OS Interface., , , and . ASPLOS, page 233-247. ACM, (2016)A Formal Analysis of the NVIDIA PTX Memory Consistency Model., , and . ASPLOS, page 257-270. ACM, (2019)HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems., , , , , and . HPCA, page 582-595. IEEE, (2020)Mixed-proxy extensions for the NVIDIA PTX memory consistency model: industrial product., , and . ISCA, page 1058-1070. ACM, (2022)Nimble Page Management for Tiered Memory Systems., , , and . ASPLOS, page 331-345. ACM, (2019)Shared last-level TLBs for chip multiprocessors., , and . HPCA, page 62-63. IEEE Computer Society, (2011)TLB Improvements for Chip Multiprocessors: Inter-Core Cooperative Prefetchers and Shared Last-Level TLBs., , and . ACM Trans. Archit. Code Optim., 10 (1): 2:1-2:38 (2013)Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator., , , , , , , and . HPCA, page 868-880. IEEE, (2021)