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A Conservative Approximation Method for the Verification of Preemptive Scheduling Using Timed Automata., , и . IEEE Real-Time and Embedded Technology and Applications Symposium, стр. 255-264. IEEE Computer Society, (2009)Energy efficient code generation exploiting reduced bit-width instruction set architectures (rISA)., и . ASP-DAC, стр. 475-477. IEEE Computer Society, (2004)Partitioning of Variables for Multiple-Register-File VLIW Architectures., , и . ICPP (1), стр. 298-301. CRC Press, (1994)TRAM: A tool for Temperature and Reliability Aware Memory Design., , , , , , и . DATE, стр. 340-345. IEEE, (2009)ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement., , , , и . DATE, стр. 1246-1251. IEEE Computer Society, (2005)Flexible NTT Accelerators for RLWE Lattice-Based Cryptography., , и . ICCD, стр. 329-332. IEEE, (2019)Behavioral Array Mapping into Multiport Memories Targeting Low Power., и . VLSI Design, стр. 268-273. IEEE Computer Society, (1997)The information processing factory: a paradigm for life cycle management of dependable systems., , , , , , , , , и 8 other автор(ы). CODES+ISSS, стр. 20:1-20:2. ACM, (2019)ARGA: Approximate Reuse for GPGPU Acceleration., , , , и . DAC, стр. 8. ACM, (2019)Approximation-aware coordinated power/performance management for heterogeneous multi-cores., , , , , и . DAC, стр. 68:1-68:6. ACM, (2018)