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Disambiguation of "Mak, Terrence S. T."

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Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip.

, , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)

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T S Semerak

S T PATIL D S BORMANE

Ellen Mak

Rebecca Mak

Kwok Mak

 

Other publications of authors with the same name

Hybrid wire-surface wave architecture for one-to-many communication in networks-on-chip., , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Global interconnections in FPGAs: modeling and performance analysis., , , , , and . SLIP, page 51-58. ACM, (2008)Wave-pipelined signaling for on-FPGA communication., , , and . FPT, page 9-16. IEEE, (2008)A Lifetime Reliability-Constrained Runtime Mapping for Throughput Optimization in Many-Core Systems., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (9): 1771-1784 (2019)Adaptive Routing Algorithms for Lifetime Reliability Optimization in Network-on-Chip., , and . IEEE Trans. Computers, 65 (9): 2896-2902 (2016)On the Nanocommunications at THz Band in Graphene-Enabled Wireless Network-on-Chip., , , and . CoRR, (2017)An Efficient Channel Model for Evaluating Wireless NoC Architectures., , , , and . SBAC-PAD (Workshops), page 85-90. IEEE Computer Society, (2016)Memory efficient on-line streaming for multichannel spike train analysis., , , , , and . EMBC, page 2315-2318. IEEE, (2011)Feasibility study for future implantable neural-silicon interface devices., , , , and . EMBC, page 3009-3015. IEEE, (2011)A scalable FPGA-based cerebellum for passage-of-time representation., , , , , and . EMBC, page 3102-3105. IEEE, (2014)