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Disambiguation of "Xu, Xiaoqing"

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Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation.

, , , , , and . CoRR, (2020)

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Xiaoqing Xu

Xiaoqing Pan

Xiaoqing Liu

Xu Xu

Xiaoqing Li

 

Other publications of authors with the same name

Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (5): 726-739 (2015)DTCO for DSA-MP Hybrid Lithography with Double-BCP Materials in Sub-7nm Node., , , , and . ICCD, page 403-410. IEEE Computer Society, (2017)Self-Aligned Double-Patterning Aware Legalization., , , , and . DATE, page 1145-1150. IEEE, (2020)APOLLO: An Automated Power Modeling Framework for Runtime Power Introspection in High-Volume Commercial Microprocessors., , , , , , , , , and . MICRO, page 1-14. ACM, (2021)Improving Standard-Cell Design Flow using Factored Form Optimization., , , , , and . DAC, page 1-6. IEEE, (2023)Layout-dependent aging mitigation for critical path timing., , , , , , , and . ASP-DAC, page 153-158. IEEE, (2018)Methodology for standard cell compliance and detailed placement for triple patterning lithography., , , and . CoRR, (2014)Pushing multiple patterning in sub-10nm: are we ready?, , , , and . DAC, page 197:1-197:6. ACM, (2015)PARR: pin access planning and regular routing for self-aligned double patterning., , , , and . DAC, page 28:1-28:6. ACM, (2015)Enhanced 3D Implementation of an Arm® Cortex®-A Microprocessor., , , , and . ISLPED, page 1-6. IEEE, (2019)