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Multi-level Parallelism for Time- and Cost-Efficient Parallel Discrete Event Simulation on GPUs.

, , , and . PADS, page 23-32. IEEE Computer Society, (2012)

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Determination of throughput guarantees for processor-based SmartNICs., , , , , and . CoNEXT, page 267-281. ACM, (2021)Design of High-Power High-Frequency Coreless Transformer Systems. MIT, USA, (2022)Multi-level Parallelism for Time- and Cost-Efficient Parallel Discrete Event Simulation on GPUs., , , and . PADS, page 23-32. IEEE Computer Society, (2012)SymPerf: Predicting Network Function Performance., , , , , , and . SIGCOMM Posters and Demos, page 34-36. ACM, (2017)Artifact for the CAV 2018 Paper: Symbolic Liveness Analysis of Real-World Software., , , , and . (July 2018)Artifact for the CAV 2020 Paper: Symbolic Partial-Order Execution for Testing Multi-Threaded Programs., , , , and . (July 2020)A Deterministic Memory Allocator for Dynamic Symbolic Execution., , , , and . ECOOP, volume 222 of LIPIcs, page 9:1-9:26. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2022)KDAlloc: The KLEE Deterministic Allocator: Deterministic Memory Allocation during Symbolic Execution and Test Case Replay., , , , and . ISSTA, page 1491-1494. ACM, (2023)Patch Specifications via Product Programs., , and . FormaliSE, page 39-43. IEEE, (2023)Symbolic Partial-Order Execution for Testing Multi-Threaded Programs., , , , and . CAV (1), volume 12224 of Lecture Notes in Computer Science, page 376-400. Springer, (2020)