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Disambiguation of "Jordans, Roel"

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PET-to-MLIR: A polyhedral front-end for MLIR.

, , , , and . DSD, page 551-556. IEEE, (2020)

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Roel Kersten

Roel Verdult

Adolf Jordans

Josef Jordans

Roel Dobbe

 

Other publications of authors with the same name

Instruction-set architecture exploration strategies for deeply clustered VLIW ASIPs., , , and . MECO, page 38-41. IEEE, (2013)TDO-CIM: Transparent Detection and Offloading for Computation In-memory., , , , , , and . DATE, page 1602-1605. IEEE, (2020)A Review of Near-Memory Computing Architectures: Opportunities and Challenges., , , , , , , and . DSD, page 608-617. IEEE Computer Society, (2018)Mixed-length SIMD code generation for VLIW architectures with multiple native vector-widths., , , , , and . ASAP, page 181-188. IEEE Computer Society, (2015)Necessity of Fault Tolerance Techniques in Xilinx Kintex 7 FPGA Devices for Space Missions: A Case Study., , and . DSD, page 299-306. IEEE Computer Society, (2017)Loop Overhead Reduction Techniques for Coarse Grained Reconfigurable Architectures., , , and . DSD, page 14-21. IEEE Computer Society, (2017)Near-memory computing: Past, present, and future., , , , , , , and . Microprocess. Microsystems, (2019)Prebypass: Software Register File Bypassing for Reduced Interconnection Architectures., , , , and . DSD, page 157-164. IEEE, (2022)Fast and Portable Vector DSP Simulation Through Automatic Vectorization., , and . SCOPES, page 47-53. ACM, (2018)An Automated Flow to Map Throughput Constrained Applications to a MPSoC., , , , and . PPES, volume 18 of OASIcs, page 47-58. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany, (2011)