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Disambiguation of "Mir, Salvador"

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High frequency jitter estimator for SoCs.

, , , , , and . ETS, page 1-6. IEEE, (2015)

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Mir Ferdowsi

Michael Salvador

Salvador Herrador

Salvador Oberhaus

Salvador Fernandes

 

Other publications of authors with the same name

Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods., , , , and . VLSI-SoC (Selected Papers), volume 461 of IFIP Advances in Information and Communication Technology, page 188-207. Springer, (2013)Pseudorandom BIST for test and characterization of linear and nonlinear MEMS., , , , and . Microelectron. J., 40 (7): 1054-1061 (2009)On-Chip Pseudorandom MEMS Testing., , , and . J. Electron. Test., 21 (3): 233-241 (2005)Analog/RF test ordering in the early stages of production testing., , , and . VTS, page 25-30. IEEE Computer Society, (2012)Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs., , , , and . European Test Symposium, page 1-6. IEEE Computer Society, (2012)A Tool for Analog/RF BIST Evaluation Using Statistical Models of Circuit Parameters., , , and . ACM Trans. Design Autom. Electr. Syst., 20 (2): 31:1-31:22 (2015)Noise modeling using look-up tables and DC measurements for cryogenic applications., , , , , , and . VLSI-SoC, page 1-6. IEEE, (2023)Design of high-performance band-pass sigma-delta modulator with concurrent error detection., , , and . ICECS, page 1202-1205. IEEE, (1996)Low-cost EVM built-in test of RF transceivers., , , and . IDT, page 51-54. IEEE, (2014)Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs., , , and . VLSI-SoC, page 1-6. IEEE, (2014)