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SysML models: studying safety and security measures impact on performance using graph tainting.

, , and . MoDELS (Companion), page 79:1-79:10. ACM, (2020)

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Efficient Scheduling of FPGAs for Cloud Data Center Infrastructures., , , and . DSD, page 57-64. IEEE, (2020)Flexible front-end processing for software defined radio applications using application specific instruction-set processors., , , , , , and . DASIP, page 1-8. IEEE, (2012)Evaluation of ASIPs Design with LISATek., , and . SAMOS, volume 5114 of Lecture Notes in Computer Science, page 177-186. Springer, (2008)Reconfigurable DSP Architectures for SDR Applications., , , and . ICECS, page 971-974. IEEE, (2007)Fast Simulation Techniques for Design Space Exploration., , and . TOOLS (47), volume 33 of Lecture Notes in Business Information Processing, page 308-327. Springer, (2009)Execution Trace Analysis for a Precise Understanding of Latency Violations., , and . MoDELS, page 123-133. IEEE, (2021)LUX: An Heterogeneous Function Composition Parallel Computer for Graphics., and . Euro-Par, volume 1685 of Lecture Notes in Computer Science, page 940-949. Springer, (1999)SecBus: Operating System controlled hierarchical page-based memory bus protection., , , , and . DATE, page 570-573. IEEE, (2009)Odyn: Deadlock Prevention and Hybrid Scheduling Algorithm for Real-Time Dataflow Applications., , , and . DSD, page 88-95. IEEE, (2019)Static Data-Flow Analysis of UML/SysML Functional Views for Signal and Image Processing Applications., , , and . MODELSWARD (Revised Selected Papers), volume 1161 of Communications in Computer and Information Science, page 101-126. Springer, (2019)