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SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix Multiplication.

, , , , , и . IEEE Trans. Computers, 71 (11): 2816-2828 (2022)

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Tae-Seok Jang

Liem Khiem Jang

Saeed Jangani

Eun-Ju Jang

Hee-Kwon Jang

 

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Charge-Recycling based Redundant Write Prevention Technique for Low Power SOT-MRAM., , и . ISCAS, стр. 1-4. IEEE, (2018)BiMDiM: Area efficient Bi-directional MRAM Digital in-Memory Computing., , , и . AICAS, стр. 74-77. IEEE, (2022)Dynamic-Reference Based Early Write Termination for Low Energy SOT-MRAM., , , , и . ISCAS, стр. 1-5. IEEE, (2020)Stochastic SOT Device Based SNN Architecture for On-Chip Unsupervised STDP Learning., , , , , , и . IEEE Trans. Computers, 71 (9): 2022-2035 (2022)SOT-MRAM-Based LUT Cell Design for Area- and Energy-Efficient FPGA., , , и . IEEE Trans. Circuits Syst. II Express Briefs, 71 (9): 4276-4280 (сентября 2024)Area and Energy Efficient Joint 2T SOT-MRAM-Based on Diffusion Region Sharing With Adjacent Cells., и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1622-1626 (2022)STT-MRAM-based Near-Memory Computing Architecture with Read Scheme and Dataflow Co-Design for High-Throughput and Energy-Efficiency., , и . ISLPED, стр. 1-6. ACM, (2024)Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP Learning., , и . ISLPED, стр. 21:1-21:6. ACM, (2018)SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix Multiplication., , , , , и . IEEE Trans. Computers, 71 (11): 2816-2828 (2022)A Dual-Domain Dynamic Reference Sensing for Reliable Read Operation in SOT-MRAM., , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (5): 2049-2059 (2022)