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Architecting against Software Cache-Based Side-Channel Attacks.

, , , and . IEEE Trans. Computers, 62 (7): 1276-1288 (2013)

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Architecting against Software Cache-Based Side-Channel Attacks., , , and . IEEE Trans. Computers, 62 (7): 1276-1288 (2013)Hardware-software integrated approaches to defend against software cache-based side channel attacks., , , and . HPCA, page 393-404. IEEE Computer Society, (2009)A unified optimizing compiler framework for different GPGPU architectures., , , , and . ACM Trans. Archit. Code Optim., 9 (2): 9:1-9:33 (2012)A GPGPU compiler for memory optimization and parallelism management., , , and . PLDI, page 86-97. ACM, (2010)Improving software security via runtime instruction-level taint checking., , and . ASID, page 18-24. ACM, (2006)Improving privacy and lifetime of PCM-based main memory., and . DSN, page 333-342. IEEE Computer Society, (2010)Deconstructing new cache designs for thwarting software cache-based side channel attacks., , , and . CSAW, page 25-34. ACM, (2008)Accelerating MATLAB Image Processing Toolbox functions on GPUs., , , , , , , and . GPGPU, volume 425 of ACM International Conference Proceeding Series, page 75-85. ACM, (2010)An adaptive coordinated medium access control for wireless sensor networks., , and . ISCC, page 214-219. IEEE Computer Society, (2004)An optimizing compiler for GPGPU programs with input-data sharing., , , and . PPoPP, page 343-344. ACM, (2010)