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Disambiguation of "Shebanow, Michael"

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HPS, a new microarchitecture: rationale and introduction.

, , and . MICRO, page 103-108. ACM/IEEE, (1985)

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Michael Liecke

Subnationale Clusterpolitik: die Biotechnologiepolitik deutscher Länder im Vergleich. Uni München, (2009)

Michael Bode

Le groupe international de sociétés: le système de conflit de lois en droit comparé français et allemand. HU Berlin, (2009)

Michael Schoierer

NS-Diktatur, Anomie und Demokratisierung Westdeutschlands. Uni Augsburg, (2007)

Michael Krug

X-ray crystallographic analysis of the archaeal transcriptional regulator TrmB and development of a graphical user interface for the monochromatic diffraction data processing software XDS. Uni Konstanz, (2009)

Michael Bernateck

Komplexes Regionales Schmerzsyndrom Typ 1 (M.Sudeck): neue Aspekte zur Symptomatologie, Pathogenese, Diagnostik und Therapie. MedH Hannover, habilitation, (2009)
 

Other publications of authors with the same name

Hardware support for large atomic units in dynamically scheduled machines., , and . MICRO, page 60-63. ACM/IEEE, (1988)Run-time generation of HPS microinstructions from a VAX instruction stream., , , , and . MICRO, page 75-81. ACM/IEEE, (1986)Peta Thread Computing Keynote I.. ISPASS, page 1. IEEE Computer Society, (2013)Pervasive massively multithreaded GPU processors.. Conf. Computing Frontiers, page 227. ACM, (2009)Aquarius., , , , , , , , , and 4 other author(s). SIGARCH Comput. Archit. News, 15 (1): 22-34 (1987)Experiments with HPS, a Restricted Data Flow Microarchitecture for High Performance Computers., , , , , and . COMPCON, page 254-258. IEEE Computer Society, (1986)On tuning the microarchitecture of an HPS implementation of the VAX., , , , and . MICRO, page 162-167. ACM/IEEE, (1987)Improving GPU performance via large warps and two-level warp scheduling., , , , , and . MICRO, page 308-317. ACM, (2011)Single Instruction Stream Parallelism is Greater Than Two., , , , , and . ISCA, page 276-286. ACM, (1991)Implementation Trade-Offs in Using a Restricted Data Flow Architecture in a High Performance RISC Microprocessor., , , , , , , , , and . ISCA, page 151-162. ACM, (1995)