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Другие публикации лиц с тем же именем

A Memory Aware High Level Synthesis Tool ., , , и . ISVLSI, стр. 279-280. IEEE Computer Society, (2004)Memory Aware HLS and the Implementation of Ageing Vectors., , , и . DSD, стр. 88-95. IEEE Computer Society, (2004)Defining an annex language to the architecture analysis and design language for requirements engineering activities support., , и . MoDRE, стр. 11-20. IEEE Computer Society, (2011)Self-Timed Design: An Avenue to Complex Computer Systems., и . HICSS, IEEE Computer Society, (1999)Building and Using System, Algorithmic, and Architectural Power and Energy Models in the FPGA Design., , , , и . ReCoSoC, стр. 83-90. Univ. Montpellier II, (2006)A Memory Aware High Level Synthesis Too, , , и . CoRR, (2006)Intégration de la synthèse mémoire dans l'outil de synthèse d'architecture GAUT Low Power, , , и . CoRR, (2006)Towards a Dynamic Infrastructure for Playing with Systems of Systems., , , и . ECSA Workshops, стр. 31:1-31:4. ACM, (2014)Designing a low-power (self-timed) router for a MIMD computer., и . ISCAS, стр. 737-740. IEEE, (2000)Realistic energy modeling of scheduling, interprocess-communication and context switch routines., , и . DTIS, стр. 1-6. IEEE, (2012)